Dynamic Reconfiguration

A dynamically reconfigurable monolithic cmos pressure sensor for smart fabric

System on Chip / System on a Chip / Solid State Devices and Circuits / Pressure Sensor / Data Processing / Electrical And Electronic Engineering / Pressure Sensors / Intelligent Sensors / Dynamic Reconfiguration / Capacitive Sensors / Electrical And Electronic Engineering / Pressure Sensors / Intelligent Sensors / Dynamic Reconfiguration / Capacitive Sensors

A dynamically reconfigurable monolithic cmos pressure sensor for smart fabric

Solid State Devices and Circuits / Pressure Sensor / Electrical And Electronic Engineering / Dynamic Reconfiguration

UML design for dynamically reconfigurable multiprocessor embedded systems

Object Tracking / Design Methodology / Embedded processor / Automatic code generation / Partial Reconfiguration / Embedded System / Dynamic Reconfiguration / Dynamic Properties / Embedded System / Dynamic Reconfiguration / Dynamic Properties

Towards a Dynamically Reconfigurable Automotive Control System Architecture

Embedded Systems / Control system / Middleware / System Architecture / Consumer Electronics / Dynamic Router Configuration protocol / Use Case / Automotive control systems / Context Aware / Dynamic Reconfiguration / Resource Availability / Dynamic Router Configuration protocol / Use Case / Automotive control systems / Context Aware / Dynamic Reconfiguration / Resource Availability

System-Level Design Space Exploration of Dynamic Reconfigurable Architectures

Case Study / Design Space Exploration / System-level design / Boolean Satisfiability / System performance / Dynamic Reconfiguration / RECONFIGURABLE LOGIC / Dynamic Reconfiguration / RECONFIGURABLE LOGIC

Development system for FPGA-based digital circuits

Digital Circuits / Logic Synthesis / Software Tool / Dynamic Reconfiguration / Virtual Circuit

Dynamic Reconfigurability in Embedded System Design

Circuits and Systems / Embedded System Design / Design Methodology / Embedded System / Dynamic Reconfiguration

UML design for dynamically reconfigurable multiprocessor embedded systems

Object Tracking / Design Methodology / Embedded processor / Automatic code generation / Partial Reconfiguration / Embedded System / Dynamic Reconfiguration / Dynamic Properties / Embedded System / Dynamic Reconfiguration / Dynamic Properties

Towards a Dynamically Reconfigurable Automotive Control System Architecture

Embedded Systems / Control system / Middleware / System Architecture / Consumer Electronics / Dynamic Router Configuration protocol / Use Case / Automotive control systems / Context Aware / Dynamic Reconfiguration / Resource Availability / Dynamic Router Configuration protocol / Use Case / Automotive control systems / Context Aware / Dynamic Reconfiguration / Resource Availability

A data scheduler for multi-context reconfigurable architectures

Computer Architecture / Digital Signal Processing / Scheduling / Memory Management / DSP / Data storage / Kernel / Data transfer / Chip / Data Handling / System performance / Programmable Logic / Dynamic scheduling / Dynamic Reconfiguration / Instruction Level Parallelism / Data storage / Kernel / Data transfer / Chip / Data Handling / System performance / Programmable Logic / Dynamic scheduling / Dynamic Reconfiguration / Instruction Level Parallelism

A complete data scheduler for multi-context reconfigurable architectures

Data storage / Dynamic Reconfiguration

A dynamically reconfigurable adaptive viterbi decoder

FPGA / Digital Communication / Reconfigurable Hardware / Performance Improvement / The / Viterbi algorithm / Dynamic Reconfiguration / Viterbi Decoder / Error Correction Code / Viterbi algorithm / Dynamic Reconfiguration / Viterbi Decoder / Error Correction Code

Development system for FPGA-based digital circuits

Digital Circuits / Field-Programmable Gate Arrays / Hardware / CoProcessors / Digital Circuit / Logic Design / Logic Synthesis / Software Tool / Dynamic Reconfiguration / Virtual Circuit / Logic Design / Logic Synthesis / Software Tool / Dynamic Reconfiguration / Virtual Circuit

System-level power-performance tradeoffs for reconfigurable computing

Computer Architecture / Distributed Computing / Reconfigurable Computing / Computer Hardware / Hardware / Case Study / Design Methodology / Low Power / Mobile phone / System on a Chip / Embedded Computing / Embedded System / Electrical And Electronic Engineering / Dynamic Reconfiguration / Data Partitioning / Application Software / Case Study / Design Methodology / Low Power / Mobile phone / System on a Chip / Embedded Computing / Embedded System / Electrical And Electronic Engineering / Dynamic Reconfiguration / Data Partitioning / Application Software

A reconfigurable fully parallel associative processor

Computer Architecture / Distributed Computing / Image Processing / Parallel Processing / Parallel & Distributed Computing / Computer Graphic / Data transfer / High performance / Chip / Associative Memory / Reconfiguration / Dynamic Reconfiguration / Circuit Optimization / Computer Graphic / Data transfer / High performance / Chip / Associative Memory / Reconfiguration / Dynamic Reconfiguration / Circuit Optimization

Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system

Image Processing / Computer Hardware / Field-Programmable Gate Arrays / High Level Synthesis / Real Time Embedded Systems / Embedded System Design / Field Programmable Gate Array / Microprocessors / Data Flow Graph / Embedded System / Electrical And Electronic Engineering / Dynamic Reconfiguration / Embedded Device / Embedded System Design / Field Programmable Gate Array / Microprocessors / Data Flow Graph / Embedded System / Electrical And Electronic Engineering / Dynamic Reconfiguration / Embedded Device

Copyright © 2017 DADOSPDF Inc.